Senior Java Full stack with Node JS React JS architect in Engineering
Modify my search
Listed two hours ago
  • Develop DSP solutions for 5G/6G L1 layer (PHY)
  • Exp in DSP/embedded system programming in ARM/X86
  • Develop driver real time performance to interact with hardware accelerators FPGA
  • Develop DSP solutions for 5G/6G L1 layer (PHY)
  • Exp in DSP/embedded system programming in ARM/X86
  • Develop driver real time performance to interact with hardware accelerators FPGA
Physical layer (PHY) DSP solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
Physical layer (PHY) DSP solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
subClassification: Electrical/Electronic EngineeringElectrical/Electronic Engineering
classification: Engineering(Engineering)
2h ago
2h ago
Listed two hours ago
  • Work at ASTRI and study PhD concurrently
  • Support and lead R&D project
  • A Master’s Degree in a STEM-related discipline
  • Work at ASTRI and study PhD concurrently
  • Support and lead R&D project
  • A Master’s Degree in a STEM-related discipline
ASTRI WORK-STUDY Programme (PhD)
ASTRI WORK-STUDY Programme (PhD)
subClassification: Electrical/Electronic EngineeringElectrical/Electronic Engineering
classification: Engineering(Engineering)
2h ago
2h ago
Listed four hours ago
  • 12d AL, 5d work, bank holiday
  • Transportation allowance, medical
  • Discretionary bonus, 5min walk from Kwai Fong MTR
  • 12d AL, 5d work, bank holiday
  • Transportation allowance, medical
  • Discretionary bonus, 5min walk from Kwai Fong MTR
Provides full support to sales team in all technical aspects, including designing and proposing lighting products and systems...
Provides full support to sales team in all technical aspects, including designing and proposing lighting products and systems...
subClassification: Electrical/Electronic EngineeringElectrical/Electronic Engineering
classification: Engineering(Engineering)
4h ago
4h ago
Listed two hours ago
  • Develop baseband solutions for 5G base stations
  • Perform RTL coding in FPGA for 5G/6G PHY layer
  • FPGA development on Xilinx devices & build flow incl. design entry in Verilog
  • Develop baseband solutions for 5G base stations
  • Perform RTL coding in FPGA for 5G/6G PHY layer
  • FPGA development on Xilinx devices & build flow incl. design entry in Verilog
Physical layer (PHY) FPGA solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
Physical layer (PHY) FPGA solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
subClassification: Electrical/Electronic EngineeringElectrical/Electronic Engineering
classification: Engineering(Engineering)
2h ago
2h ago
Listed three hours ago

搶先申請

This is a Full time job

馬灣, 荃灣區
持有A級電力工程證明書(A牌)
持有A級電力工程證明書(A牌)
subClassification: Electrical/Electronic EngineeringElectrical/Electronic Engineering
classification: Engineering(Engineering)
3h ago
3h ago
Modify my search
這些搜尋結果適合你嗎?

Receive new jobs for this search by email

Return to search results
Modify my search

Select a job

Display details here