Listed fourteen days ago
This is a Full time job
Sha Tin District
- Master degree in Electrical Engineering or relevant disciplines with 5 years exp
- Hands-on experience in Verilog coding, IC design and verification is a must
- Candidates with less experience will be considered as Senior Engineer/Engineer
- Master degree in Electrical Engineering or relevant disciplines with 5 years exp
- Hands-on experience in Verilog coding, IC design and verification is a must
- Candidates with less experience will be considered as Senior Engineer/Engineer
Digital IC design (front-end and back-end); FPGA prototyping; full-flow tape-out from architecture/specification to chip bring-up.
Digital IC design (front-end and back-end); FPGA prototyping; full-flow tape-out from architecture/specification to chip bring-up.
14d ago
14d ago