Listed two days ago
- Develop baseband solutions for 5G base stations
- Perform RTL coding in FPGA for 5G/6G PHY layer
- FPGA development on Xilinx devices & build flow incl. design entry in Verilog
- Develop baseband solutions for 5G base stations
- Perform RTL coding in FPGA for 5G/6G PHY layer
- FPGA development on Xilinx devices & build flow incl. design entry in Verilog
Physical layer (PHY) FPGA solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
Physical layer (PHY) FPGA solution development in multiple platforms in ASTRI’s 5G/6G R&D projects
2d ago
2d ago